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 Forum: AndeSight MCU/RDS   Topic: AndeSight v1.4 MCU設定off-core memory latency

Posted: Wed Apr 20, 2011 11:49 am 

Replies: 0
Views: 7052


AndeSight v1.4 MCU版沒有圖形化介面,
打開vep會如下圖的文字檔
Attachment:
kk1.gif
kk1.gif [ 20.47 KiB | Viewed 7052 times ]


如果我們要修改off-core memory latency的設定,
把下面這些82的地方改成我們要的數值就可以了,
例如設為0。
Code:
--pipeline-dcache-miss-delay 82 --pipeline-dcache-off-delay 82 --pipeline-icache-miss-delay 82 --pipeline-icache-off-delay 82
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