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Running Dhrystone error with N968A on AICE target http://forum.andestech.com/viewtopic.php?f=23&t=771 |
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Author: | ianfeng [ Wed Dec 25, 2013 11:51 am ] |
Post subject: | Running Dhrystone error with N968A on AICE target |
Running Dhrystone will jump to "OS_Trap_General_Exception" on an AICE target with N968A netlist. It is OK on a SID target. ==================================== __cpu_init() code issue in "init-default.c" file. Origial code in __cpu_init() of Dhrystone: Code: #if (defined(NDS32_BASELINE_V3M) || defined(NDS32_BASELINE_V3)) /* Set PPL2FIX_EN to 0 to enable Programmable * Priority Level */ __nds32__mtsr(0x0, NDS32_SR_INT_CTRL); /* set priority HW0: 0, HW1: 1, HW2: 2, HW3: 3 * HW4-: 0 */ __nds32__mtsr(0xe4, NDS32_SR_INT_PRI); #endif The above code should be updated to the following: Code: #if (defined(NDS32_BASELINE_V3M) || defined(NDS32_BASELINE_V3))
/* Check interrupt priority programmable* * IVB.PROG_PRI_LVL * 0: Fixed priority -- no exist ir18 1r19 * 1: Programmable priority */ if (__nds32__mfsr(NDS32_SR_IVB) & 0x01) { /* Set PPL2FIX_EN to 0 to enable Programmable * Priority Level */ __nds32__mtsr(0x0, NDS32_SR_INT_CTRL); /* Check IVIC numbers (IVB.NIVIC) */ if ((__nds32__mfsr(NDS32_SR_IVB) & 0x0E)>>1 == 5) { // 32IVIC /* set priority HW9: 0, HW13: 1, HW19: 2, * HW#-: 0 */ __nds32__mtsr(0x04000000, NDS32_SR_INT_PRI); __nds32__mtsr(0x00000080, NDS32_SR_INT_PRI2); } else { /* set priority HW0: 0, HW1: 1, HW2: 2, HW3: 3 * HW4-: 0 */ __nds32__mtsr(0x000000e4, NDS32_SR_INT_PRI); } } #endif |
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