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 Forum: AndeStar   Topic: 2 words read turn to burst-8 on axi-bus when executing lmw

Posted: Mon Jan 09, 2017 7:49 pm 

Replies: 0
Views: 13072


When Andes ISA "lmw/smw" execute on axi-bus, axi-bus will send burst-8 words. 8 words alignment may cause problem when reach IO peripheral. There are no 8 words alignment problem if executing basic load/store instruction on axi-bus. for eample, C code: u64_t mem_value64; mem_value64 = MEM6...

 Forum: Realtime OS   Topic: IVIC/EVIC mode setup in eCos

Posted: Tue Jan 03, 2017 12:23 pm 

Replies: 0
Views: 13010


There are 2 interrupts mode "IVIC/EVIC" in Andes core N10,D10 and N13.
The interrupt mode of default eCos demo program set IVIC mode. If your EVB netlist is EVIC mode, you have to setup eCos configuration tools as following picture. For example, N1337 EVIC mode:

 Forum: AndeStar   Topic: coalesable design in Andes NTC/NTM

Posted: Thu Dec 29, 2016 2:37 pm 

Replies: 0
Views: 11914


explained coalesable meaning in document chapter 2.2.3 of AndeStar_SPA_V3_UM072_V1.4.pdf. When bufferable device transfer data to bufferable device, both sides write commands will be “UN-ORDERED” transfer. other combination will be "IN-ORDERED" transfer. Please study following description ...

 Forum: Programming   Topic: How to How to fix compilation errors mentioned stray '\241'

Posted: Tue Dec 06, 2016 4:12 pm 

Replies: 0
Views: 14731


Customer copy command from slide which provided by Andes. If command includes quotation mark,for example, which will be changed by power point or word, you must change back quotation mark from Unicode quotation marks to ASCII quotation marks. compilation errors stray '\241' will disappear. you can a...

 Forum: Programming   Topic: Data conflicts between DMA and cache

Posted: Thu Nov 17, 2016 12:54 pm 

Replies: 0
Views: 13954


If DMA moves data in your system and cache enable as well, you must do "cache flush" and "cache invalidate" as following:

[*]Data from Memory to IO
[*][*]Before DMA operation, execute cache flush
[*]Data from IO to Memory
[*][*]After DMA operation, execute cache invalidate

 Forum: Realtime OS   Topic: FreeRTOS run on AndesPlatform

Posted: Thu Nov 17, 2016 12:37 pm 

Replies: 0
Views: 12474


Attachment:
RTOS on Andes platform2016-10-05.jpg
RTOS on Andes platform2016-10-05.jpg [ 51.33 KiB | Viewed 12474 times ]
The "context switch" of FreeRTOS is made by "Software interrupt".
Hardware wired as attached picture. otherwise, FreeRTOS can't run on Andes core.

 Forum: Programming   Topic: decide heap start/end in malloc

Posted: Thu Sep 29, 2016 12:15 pm 

Replies: 0
Views: 14108


If you use malloc function, system will automatically decide heap start/end address. If you want to decide heap start/end address by yourself. Please follow below procedure: Please add the attached file to your project and use the following statement to set the heap in the SaG file. VAR _HEAP_MIN = ...

 Forum: AndeSight STD   Topic: multi-core debug in Andesight

Posted: Fri Jul 22, 2016 6:24 pm 

Replies: 1
Views: 12745


The way to automatically start ICEman: 1. Launch core0 project without disabling “Target Management Service". ICEman will be started by AndeSight. (auto run in port 9900) 2. Record the port no. of core1 in ICEman window. 3. Disable “Target Management Service" in core1 project and set Port ...

 Forum: Embedded Linux   Topic: Install Andesight in linux, but "Project Creator" is empty.

Posted: Fri May 15, 2015 7:38 pm 

Replies: 0
Views: 31324


"Andes Project Creator" is empty as attached picture if you install Andesight STD in linux.
you can re-install and pick up "full install" to solve this problem of "empty Andes Project Creator"

 Forum: BSP (Board Support Package)   Topic: 請問 BSP 可否用在 MacOSX 上?

Posted: Mon Aug 15, 2011 6:19 pm 

Replies: 3
Views: 13161


Dear jjhuang, 請問 BSP 可否用在 MacOSX 上? ANS: 目前可以在 PC的XP或linux上執行,如果希望在MacOSX上執行,需要加一層virutal platform(Mac->x86),如vmware,virtual box... 那麼 BSP 是否有 source code? ANS:BSP中support linux,ucosII,freertos 的source code. 1. toolchain(包含在 osdk 裡) 2. simulator(包含在 osdk 裡) 3. 完整 compile 整個 uC/OSII 系統,並且在 simulator ...
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